https://data.archives-ouvertes.fr/author/175593

https://data.archives-ouvertes.fr/author/175593

http://xmlns.com/foaf/0.1/topic_interest Field Programmable Gates Array FPGA
http://xmlns.com/foaf/0.1/topic_interest Transistors mismatch
http://xmlns.com/foaf/0.1/topic_interest Attacks mitigation
http://xmlns.com/foaf/0.1/topic_interest Cryptographically secure shield
http://xmlns.com/foaf/0.1/topic_interest Side-Channel Analysis SCA
http://xmlns.com/foaf/0.1/interest https://data.archives-ouvertes.fr/subject/info.info-cl
http://xmlns.com/foaf/0.1/interest https://data.archives-ouvertes.fr/subject/info.info-cr
http://xmlns.com/foaf/0.1/topic_interest Structured data caching
http://xmlns.com/foaf/0.1/topic_interest FPGA SoC
http://xmlns.com/foaf/0.1/topic_interest Configurable cache
http://xmlns.com/foaf/0.1/interest https://data.archives-ouvertes.fr/subject/info.info-es
http://xmlns.com/foaf/0.1/interest https://data.archives-ouvertes.fr/subject/info.info-dl
http://xmlns.com/foaf/0.1/topic_interest Security verification
http://xmlns.com/foaf/0.1/topic_interest Differential Power Analysis DPA
http://xmlns.com/foaf/0.1/topic_interest Countermeasure analysis
http://xmlns.com/foaf/0.1/topic_interest Chip Security
http://xmlns.com/foaf/0.1/interest https://data.archives-ouvertes.fr/subject/sdv.gen.gh
http://xmlns.com/foaf/0.1/topic_interest Cache memory
http://xmlns.com/foaf/0.1/topic_interest Dual-rail with Precharge Logic DPL
http://xmlns.com/foaf/0.1/topic_interest Adaptative Predictive Cache
http://xmlns.com/foaf/0.1/topic_interest Security
http://xmlns.com/foaf/0.1/topic_interest Image processing
http://xmlns.com/foaf/0.1/topic_interest Focused Ion Beam FIB
http://xmlns.com/foaf/0.1/topic_interest Differential Fault Analysis DFA
http://xmlns.com/foaf/0.1/topic_interest TRNG
http://xmlns.com/foaf/0.1/interest https://data.archives-ouvertes.fr/subject/info.info-mo
http://xmlns.com/foaf/0.1/topic_interest Structured data
http://www.openarchives.org/ore/terms/isAggregatedBy https://data.archives-ouvertes.fr/author/yves-mathieu
http://xmlns.com/foaf/0.1/topic_interest AIS-31
http://xmlns.com/foaf/0.1/interest https://data.archives-ouvertes.fr/subject/info.info-mm
http://xmlns.com/foaf/0.1/topic_interest Hardware Security
http://xmlns.com/foaf/0.1/topic_interest Positive dual-rail logic
http://xmlns.com/foaf/0.1/topic_interest Information leakage
http://xmlns.com/foaf/0.1/topic_interest Power-constant logic
http://xmlns.com/foaf/0.1/topic_interest SIMON block cipher
http://xmlns.com/foaf/0.1/topic_interest Standard cells design
http://xmlns.com/foaf/0.1/topic_interest Monte-Carlo simulation
http://xmlns.com/foaf/0.1/topic_interest FPGA
http://xmlns.com/foaf/0.1/topic_interest Differential signals
http://xmlns.com/foaf/0.1/topic_interest Wave Dynamic Differential Logic WDDL
http://xmlns.com/foaf/0.1/topic_interest Differential Electro-magnetic Analysis DEMA
http://xmlns.com/foaf/0.1/topic_interest Emerging Technologies csET
http://xmlns.com/foaf/0.1/topic_interest Secured backend
http://xmlns.com/foaf/0.1/topic_interest Side-channel attacks mitigation
http://xmlns.com/foaf/0.1/interest https://data.archives-ouvertes.fr/subject/info.info-ts
http://xmlns.com/foaf/0.1/name Yves Mathieu
http://xmlns.com/foaf/0.1/interest https://data.archives-ouvertes.fr/subject/spi.tron
http://xmlns.com/foaf/0.1/topic_interest Hardware design simulation
http://xmlns.com/foaf/0.1/mbox_sha1sum 8a11fef162f5757cc19ce389d99b2aad
http://xmlns.com/foaf/0.1/interest https://data.archives-ouvertes.fr/subject/spi.signal
http://xmlns.com/foaf/0.1/topic_interest Side-channel attacks
http://xmlns.com/foaf/0.1/firstName Yves
http://xmlns.com/foaf/0.1/topic_interest ND-AP Cache
http://xmlns.com/foaf/0.1/interest https://data.archives-ouvertes.fr/subject/spi.nano
http://xmlns.com/foaf/0.1/familyName Mathieu
http://www.w3.org/1999/02/22-rdf-syntax-ns#type http://xmlns.com/foaf/0.1/Person
http://xmlns.com/foaf/0.1/topic_interest Cryptographic circuits
http://xmlns.com/foaf/0.1/topic_interest Through Silicon Vias TSV
http://xmlns.com/foaf/0.1/topic_interest ElectroMagnetic Analysis EMA
http://xmlns.com/foaf/0.1/topic_interest Prince
http://xmlns.com/foaf/0.1/topic_interest Fault injection attacks FIA
http://xmlns.com/foaf/0.1/topic_interest Hardware Description Language HDL
http://xmlns.com/foaf/0.1/interest https://data.archives-ouvertes.fr/subject/info.info-ao
http://xmlns.com/foaf/0.1/topic_interest Computer-Aided Design CAD
http://xmlns.com/foaf/0.1/topic_interest ASIC
http://xmlns.com/foaf/0.1/topic_interest SubjectsHardware Architecture csAR
http://xmlns.com/foaf/0.1/topic_interest Early Evaluation EE
http://xmlns.com/foaf/0.1/interest https://data.archives-ouvertes.fr/subject/info.info-ar
http://xmlns.com/foaf/0.1/topic_interest FDSOI

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