"ECC"@en . "Ant colony optimization"@en . "ASIPs"@en . "Loops and Conditional Branches"@en . "Motion estimation" . "Dataflow programming"@en . "Dataflow computing"@en . "Graph model"@en . "Software radio"@en . . . "Index Terms Reconfigurable Computing"@en . "Real-Time Systems"@en . "Subword parallelism" . "High-level synthesis"@en . "Mapping algorithms"@en . "Multi-processor platform"@en . . "Custom instructions"@en . . . "Fault-tolerant design"@en . "Connected convex subgraphs"@en . "Dataflow model"@en . "Hardware acceleration"@en . . "Embedded systems"@en . "Synth\u00E8se de haut niveau"@fr . . "Distributed algorithm"@en . . "Computer-aided design CAD"@en . "Digital Signal Processing"@en . "Data-flow graph"@en . "Real Time Constraint"@en . "Heuristic algorithms"@en . <0000-0001-7216-749X> . "Energy minimization"@en . "Heterogeneous"@en . "IoT"@en . . "High level synthesis"@en . "Design flow"@en . . "Finite-field arithmetic"@en . "Multiprocessor systems"@en . "FFT/iFFT"@en . "Reliability"@en . "On-board processing"@en . "Subgraph enumeration algorithm"@en . "Emmanuel Casseau" . "Multiplication"@en . "Communication"@en . "Rapid prototyping"@en . "LTE"@en . "Multimedia processing"@en . "Instruction set extensions"@en . "Custom instruction enumeration"@en . "Multiprocessors"@en . "Fault tolerant"@en . "DVFS"@en . "Dynamique des traitements"@fr . "Discrete cosine transform"@en . "Normal basis"@en . "Memory sequencer"@en . "FFT"@en . "Custom operator"@en . "78d0d8e2f740f1b301efae93f014f67f" . . "Real-time"@en . "Online Scheduling"@en . "Directed acyclic graph"@en . . "Custom function units"@en . "Computation Intensive Application"@en . "Syst\u00E8mes embarqu\u00E9s"@fr . "Lock-free multithreading"@en . "Data level parallelism"@en . . "Architectural Implementation"@en . "Distributed algorithms"@en . . "Multi-core"@en . "DSP application"@en . "System level design"@en . "Multimedia applications"@en . "Halving scalar multiplication"@en . . "Real-time and embedded systems"@en . "Subgraph selection algorithm"@en . "Fault tolerance"@en . "Embedded system"@en . "Multicores"@en . "Custom instruction selection"@en . "Multicore processing"@en . "Task mapping"@en . "Performance Analysis"@en . "Extensible processors"@en . "Binary fields"@en . "Reconfigurable system"@en . "Mapping and scheduling"@en . "High-level synthesis HLS"@en . "Casseau" . "CubeSats"@en . "FPGA"@en . "Inversion"@en . "High level design"@en . "Real-time execution"@en . "Parallel algorithms"@en . "Recon\uFB01gurable architectures"@en . "Primary/backup approach"@en . "HEVC"@en . "Fault-tolerance"@en . "Data-\uFB02ow graph"@en . "DFG"@en . . "Energy minimisation"@en . "Custom instruction"@en . "Emmanuel" . "Hardware implementation"@en . "Reconfigurable video coding RVC"@en .